Digital cameras have become extremely common lately. There are two prevalent technologies used in digital cameras: charge-coupled device (CCD) image sensors and complimentary metal-oxide semiconductor (CMOS) image sensors. Both of these image sensors depend on the photovoltaic response resulting when silicon is exposed to light. The photons in the light have energy that breaks covalent bonds in the silicon. The electrons that are released when the covalent bonds are broken result in a photocurrent when an electric field carries the electrons away. A photodiode may collect the photocharge carried in the photocurrent, thus providing a detectable signal. The dynamic range of the image sensor is the ratio of the largest detectable signal to the smallest detectable signal.
The photocharge, and thus, the detectable signal, depends on the quantum efficiency which is defined as the ratio of collected electrons to the incident photons. Because CMOS image sensors have several transistors for each pixel, many of the photons hit these transistors rather than the photodiode. In contrast, CCD image sensors have few transistors. Thus, currently, CCD image sensors have a superior dynamic range in comparison to CMOS image sensors. However, CCD image sensors are much more expensive to manufacture than CMOS image sensors. Therefore, it is very desirable to use CMOS image sensors in consumer products.
One reason that CMOS image sensors are less expensive to manufacture than CCD image sensors is because they use the same fabrication processes as other chips, such as microprocessors, application specific integrated circuits (ASICs) and the like. Therefore, research and development costs associated with improving the fabrication process benefit all the technologies, including the CMOS image sensor technology. Briefly, for a P-channel enhancement-type MOSFET, the fabrication process involves diffusing two P-regions, called the source and the drain, side by side into a surface of an N-type silicon slice. A layer of insulating silicon oxide (i.e., gate oxide) is grown over the surface. Two strips of metal are made to penetrate through windows in the oxide and to contact the silicon. A third metal strip, the gate, lies on top of the oxide, over the gap between the P regions. When a negative voltage is applied to the gate, an electric field is produced. The strength of the electric field is equal to the power supply (VCC) divided by the thickness (d) of the gate oxide.
One of the improvements in the fabrication process has concentrated on reducing the thickness of the gate oxide. This improvement increases the processing power per unit area of the MOSFET device and increases the processing speed. While the increased processing power and processing speeds are advantageous to many of the technologies using CMOS chips (i.e., microprocessors), the thinner gate oxide results in a decreased dynamic range for image sensors using the CMOS chips. This decreased dynamic range results in less contrast detail appearing in pictures having both dark and light areas.